In recent years, a technique for mounting a large number of bare chips on a circuit board has been used. The bare chips are composed of semiconductor light emitting devices typified by light emitting diode (which will be referred to as “LED” hereinbelow). By such a technique, a lighting device, and a display device or the like are manufactured. There are used LED bare chips (which will be referred to as “LED chips” hereinbelow) 0.3 mm square, for example, which are mounted with high density in specified areas on the board.
Hereinbelow, a principal structure of such a conventional LED chip will be described with reference to drawings depicted in FIG. 11A and FIG. 11B. FIG. 11B is a schematic bottom view of an LED chip 501 and FIG. 11A shows a schematic structure of a section along line B-B in FIG. 11B.
As shown in FIG. 11A and FIG. 11B, the conventional LED chip 501 has an optically transparent device board 511 having a rectangular shape, e.g., about 0.3 mm square, an n-type semiconductor layer 521 that is formed so as to cover a lower surface of the device board 511 in FIG. 11A, a p-type semiconductor layer 522 that is formed on a surface of the n-type semiconductor layer 521 and that effects light emission between the n-type semiconductor layer 521 and the p-type semiconductor layer 522, an n-electrode layer 531 that is a thin film formed on the n-type semiconductor layer 521, and a p-electrode layer 532 that is a thin film formed on the p-type semiconductor layer. On each of the electrode layers 531, 532 are formed bumps for electrical connection to a circuit board not shown. The LED chip 501 having such a configuration functions as so-called “blue LED chip” and is characterized in that an area of the n-electrode layer 531 is smaller than that of the p-electrode layer 532. As shown in FIG. 11B, accordingly, the electrode layers have different numbers of bumps formed thereon, for example, one n-bump 541 is formed on the n-electrode layer 531 and two p-bumps 542 are formed on the p-electrode layer 532.
The conventional LED chip 501 having such a configuration is mounted on the circuit board, e.g., by means of flip-chip mounting or the like, so that the bumps 541, 542 are electrically connected to electrode pads formed on the circuit board not shown, and the LED chip 501 emits light when energized from the circuit board.
In order to improve functions and characteristics of such an LED chip, various techniques have been disclosed, for example, for uniform light emission from the LED chip.
In Patent Document 1, for example, is disclosed a technique in which a p-electrode and an n-electrode formed on a front surface and a back surface, respectively, of a light emitting diode element are partitioned into a plurality of regions, in which the n-electrodes on the back surface are connected to a circuit board by die bonding, and in which the p-electrodes on the front surface are connected to a line pattern by wire bonding, whereby uniformity of distribution of currents flowing in the light emitting diode element may be improved.
In Patent Document 2 is disclosed a technique in which a comb-shaped p-type semiconductor layer is formed by diffusion on an upper surface of an n-type semiconductor layer, and in which a junction end part between the n-type semiconductor layer and the p-type semiconductor layer (i.e., an edge of a junction surface between both the semiconductor layers) is provided with a plurality of turns on a surface of an LED chip, whereby uniformity of light output distribution as a whole light emitting surface may be achieved.
In Patent Document 3 is disclosed a technique in which an n-electrode and a p-electrode are formed on a lower surface of an LED chip, and in which the electrodes are joined to a circuit board through an anisotropic conductive member. Thus light from the LED is emitted without being interrupted by the electrodes or the like on an upper surface of the LED chip, and brightness of the LED chip is thereby improved.    [Patent Document 1] Japanese unexamined patent application publication No. H11-163396 A    [Patent Document 2] Japanese unexamined patent application publication No. H04-239185 A    [Patent Document 3] Japanese unexamined patent application publication No. H09-008360 A